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  • Microphotonics Center
    of and requirement on photonics technology For a full agenda please visit http majorca mit org July 27 29 2015 Attendance is by invitation only Organizers Lionel C Kimerling MIT Late Harm Dorren TUE NL Shu Namiki AIST Japan Ronald Luijten IBM Research Zurich This workshop is dedicated to the late Professor Harm Dorren In the early morning of Monday the 30th of March Prof Harm Dorren suddenly passed away at the age of 49 years He joined Eindhoven University of Technology in 1996 where he most recently served as a full professor Harm was a bright light and a tower of strength He enlightened with his tremendous intellect he engaged with his very genuine and very human character and he led with his love his energy and his dedication to his family his work and his community Read More Read More About Us The Microphotonics Center MPhC a Read More Read More Research Our research projects fall into Read More Read More Consortium Members From the website Alcatel Lucent is Read More load more hold SHIFT key to load all load all Read More About Us The Microphotonics Center MPhC a Read More Read More Research Our research projects fall into Read More Read More Consortium Members From the website Alcatel Lucent is Read More Read More Staff Lionel C KimerlingMicrophotonics Center DirectorMassachusetts Read More Read More Faculty MIT Faculty who have a Read More Spring 2015 Announcement Program Download the full program HERE MIT Microphotonics Center Spring Meeting Co Organized By The MIT Microphotonics Center iNEMI NIST AMTech PSMC April 23 24 2015 Le Méridien Cambridge MIT by Invitation Only Read More CTR 0 1997 Documents CTR 0 Documents Biography of a Killer Technology Read More CTR I 2005 Documents CTR I Documents Digest Microphotonics Hardware for the

    Original URL path: https://mphotonics.mit.edu/ (2015-07-11)
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  • CTR Documents
    Industry Next Generation Transceivers Silicon Microphotonics Integration in III V Materials Organics in Optoelectronics Roadmap Conclusions and Recommendations Tagged under CTR CTR I Read more CTR II Documents Roadmap for the Information Age Briefing for the Executive Characterizing the Business Environment Silicon Microphotonics Packaging Vision CTR Roadshow Presentation 2011 Tagged under CTR CTR II Read more CTR III Documents Scaling Energy 2010 Scaling Copper 2011 Digest On Board Optical Interconnection

    Original URL path: https://mphotonics.mit.edu/microphotonics-center/ctr-documents (2015-07-11)
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  • Contact Us
    Center MPhC a Read More Read More Research Our research projects fall into Read More Read More Consortium Members From the website Alcatel Lucent is Read More Read More Staff Lionel C KimerlingMicrophotonics Center DirectorMassachusetts Read More Read More Faculty MIT Faculty who have a Read More Contact 77 Massachusetts Avenue Room 13 4122 Cambridge MA 02139 US 617 253 6681 617 253 6782 http mphotonics mit edu Contact Form

    Original URL path: https://mphotonics.mit.edu/microphotonics-center/contact-us (2015-07-11)
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  • Meeting Presentations (Restricted)
    IT with Photonics Spring 2011 Scaling Information Communication Technology Fall 2010 CTR III and beyond the next 10 years Spring 2010 Photonic Integration for Broadband Infrastructure Fall 2009 Opticaly Enabled Architectures Spring 2009 CTR2 The Path to a High Volume Industry Markets Infrastructure and Platforms Fall 2008 Research Roadmaps Standards for Microphotonic Integration Spring 2008 Electronic Photonic Markets Prospects for Standardization and the Consequences for Energy A Roadmap Progress Report

    Original URL path: https://mphotonics.mit.edu/microphotonics-center/meeting-presentations-restricted (2015-07-11)
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  • Login
    Technical Working Groups CTR Short Reach Interconnect TWG Open Architecture System Optimization TWG Restricted PSMC Technical Working Groups PSMC Log in Forgot Login Sign up Search Microphotonics Center 77 Massachusetts Avenue Cambridge MA 02139 Room 13 4122 phone 617 253

    Original URL path: https://mphotonics.mit.edu/microphotonics-center/login (2015-07-11)
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  • CTR
    delivery has produced an accelerating US and world appetite for bandwidth What are the barriers technological or economic to feeding this hunger What must be done to overcome them Roadmapping is the process of creating a vision for the future Roadmaps guide our progress toward that vision The process requires a framework for understanding how technology industry and policy dynamics interact and how they could evolve in the future The MIT Communications Technology Roadmap CTR program focuses on the future of enabling opto electronic technologies for next generation communications systems Our method is interdisciplinary we have assembled within MIT a team of researchers from engineering departments and from the Sloan School of Management together with knowledgeable representatives from our Microphotonics Industry Consortium membership Through our combined interactions the roadmap project will provide valuable insights and strategies for thriving in the rapidly evolving 21st century economy The CTR program incorporates an in depth understanding of technology along with the market dynamics and regulatory policy issues that frame this industry The program relies on two key methodologies for roadmapping analytical modeling tools and industry based working groups Predictive modeling tools provide us with a means of analyzing the many complex factors that shape this industry and the advancement of related technologies Some student projects have addressed this issue CTR Technology Working Groups TWGs bring together leading industry experts from across a broad range of disciplines contributing to the design manufacture and application of opto electronic components TWG members provide expert testimony as well as contribute valuable information to the CTR models and analysis A terrific Editorial Advisory Board has been assembled to oversee the production of the Roadmap The Communications Technology Roadmap will provide technology development targets for the long term evolution of photonic component integration in the optical communications industry Key

    Original URL path: https://mphotonics.mit.edu/ctr-documents (2015-07-11)
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  • Homepage
    EXECUTIVE SUMMARY Optical interconnects have become the established rack interconnection in NEBS and ETSI communications systems in carrier grade data centers high performance computing and high speed packet and circuit switching applications They are also emerging as the favored solution for board board communications within equipment racks as pervasive demand for bandwidth increases The next application evolution for optical interconnects will be on board inter module communications As bandwidth demands continue to increase the challenges of scaling cost density power efficiency and thermal control will require optimization with both component and system integration As yet no dominant designs for embedded or pluggable on board optical I O have emerged despite advances in optical cables for consumer electronics peripheral interconnects and embedded optics for high performance computing systems The purpose of this report is i to assess the viability and maturity of the key elements required to implement on board embedded optical interconnects and ii to identify gaps and opportunities to be addressed by the R D community to achieve on board optical solutions We target a notional Optical PCI Express 3 0 bus for this assessment to represent a leading high performance board level interconnect bus presently used in personal computers and servers systems PCIe is a registered trademark of PCI SIG A scalable on board optical solution has the potential to revolutionize server design Two features make PCIe 3 0 compelling i it represents a possible solution for the pin out limitations emerging in the fixed point to point links in high performance CMOS ASICs and ii the PCIe architecture has the flexibility needed to address pluggable peripheral functions such as accelerated processors InfiniBand host channel adapters SSD arrays and other demanding I O As such we believe the Optical PCI Express 3 0 O PCIe bus provides an

    Original URL path: https://mphotonics.mit.edu/ctr-documents/technical-working-groups-ctr (2015-07-11)
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  • Homepage
    interconnects have become the established rack interconnection in NEBS and ETSI communications systems in carrier grade data centers high performance computing and high speed packet and circuit switching applications They are also emerging as the favored solution for board board communications within equipment racks as pervasive demand for bandwidth increases The next application evolution for optical interconnects will be on board inter module communications As bandwidth demands continue to increase the challenges of scaling cost density power efficiency and thermal control will require optimization with both component and system integration As yet no dominant designs for embedded or pluggable on board optical I O have emerged despite advances in optical cables for consumer electronics peripheral interconnects and embedded optics for high performance computing systems The purpose of this report is i to assess the viability and maturity of the key elements required to implement on board embedded optical interconnects and ii to identify gaps and opportunities to be addressed by the R D community to achieve on board optical solutions We target a notional Optical PCI Express 3 0 bus for this assessment to represent a leading high performance board level interconnect bus presently used in personal computers and servers systems PCIe is a registered trademark of PCI SIG A scalable on board optical solution has the potential to revolutionize server design Two features make PCIe 3 0 compelling i it represents a possible solution for the pin out limitations emerging in the fixed point to point links in high performance CMOS ASICs and ii the PCIe architecture has the flexibility needed to address pluggable peripheral functions such as accelerated processors InfiniBand host channel adapters SSD arrays and other demanding I O As such we believe the Optical PCI Express 3 0 O PCIe bus provides an appropriate target for

    Original URL path: https://mphotonics.mit.edu/ctr-documents/technical-working-groups-ctr/short-reach-interconnect-twg (2015-07-11)
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